The present invention relates to a semiconductor integrated circuit package, a method of producing the package, a method of testing the package, and a method of mounting the package.
FIG. 7 is a flow chart of a manufacturing process for producing a flip-chip IC as a semiconductor integrated circuit package according to a prior art tape automated bonding (hereinafter referred to as TAB) technique. The technique illustrated in FIG. 7 includes inner lead bonding (hereinafter referred to as ILB) and outer lead bonding (hereinafter referred to as OLB). FIGS. 8(a)-8(e) are diagrams illustrating the flow of ILB and OLB in the manufacturing process of FIG. 7.
In the figures, reference numeral 1 designates an IC chip. Bumps 2 disposed on the IC chip 1 are terminals for ILB. A polyimide film carrier 4 for bonding to the IC chip 1 has inner leads 3 at its inner ends. A resin 5 is deposited on the rear surface of the IC chip 1 including the bonded portions between the bumps 2 and the inner leads 3. A printed circuit board 6 is provided for mounting of the IC chip 1 via a lead frame 3xe2x80x2. Wiring electrodes 7 are located on the printed circuit board 6. The lead frame 3xe2x80x2 constituting the outer lead portions is fixed to the wiring electrode 7 on the printed circuit board 6 with solder 8.
After semiconductor device layers are produced by a wafer process at step S71, electrodes are formed at step S72. Thereafter, a test is carried out in the wafer state at step S73 (wafer test), dicing/slicing/cutting is carried out at step S74, and chip separation is carried out at step S75. The Au bumps are formed on the electrodes of the IC chip 1 to produce the chip shown in FIG. 8(a). As shown in FIG. 8(b), the inner leads 3 on the polyimide film carrier 4 are thermally adhered, under pressure, to each other, thereby completing a flip-chip ILB at step S76, illustrated in FIG. 8(c).
Plastic molding is carried out at step S77, see FIG. 8(d), hardening is carried out at step S78, and the outer leads (lead frames) 3xe2x80x2 are cut by punching and formed into a predetermined size at step S79. Thereafter, a burn-in test is carried out at step S80 and the outer leads 2xe2x80x2 are bonded to the wiring substrate 6 with solder 8, as shown in FIG. 8(e), thereby completing the substrate mounting OLB at step S81.
Heretofore, it was required to apply solder to the wiring substrate electrode 7. Methods of bonding and heating include pulse tool heating, constant tool heating, light beam heating, and laser heating. After the substrate mounting OLB is carried out, a test of the device is carried out at step S82.
Since the flip-chip package according to the prior art TAB technique has the above-described structure, in bonding the Au bumps to the Nixe2x80x94Au gilded inner leads 3 in the ILB process, high temperature and high pressure are required and control of the applied pressure is difficult. When pressure is abruptly applied, the silicon dioxide film below the aluminum electrode of the IC chip 1 is damaged.
In addition, the inductance of the lead 3xe2x80x2 for the OLB causes deterioration of the IC chip characteristics and the lead is required to be as short as possible. This causes an especially difficult problem in high frequency circuits and high speed switching circuits. When a large current flows in an IC chip and causes heat generation, it is difficult to increase the heat conductivity between heat radiating fins and the IC chip.
It is an object of the present invention to provide a semiconductor integrated circuit chip that solves the described problems in the ILB process.
It is another object of the present invention to provide a method that is suitable for producing the described semiconductor integrated circuit.
It is still another object of the present invention to provide a semiconductor integrated circuit package and a method of producing the package that solves the problem of deterioration of the electrical characteristics due to the inductance of the leads and effectively utilizes the characteristics of an IC chip.
It is yet another object of the present invention to provide a method for mounting the described package that has a high heat radiation efficiency.
It is still another object of the present invention to provide a method for testing the described package that solves the problem in the conventional semiconductor package, i.e., curvature of an IC lead while inserting an IC chip under pressure into an IC socket fixed to a burn-in substrate for a burn-in test.
Other objects and advantages of the present invention will become apparent from the detailed description given hereinafter. It should be understood, however, that the detailed description and specific embodiments are given by way of illustration only since various changes and modifications within the scope of the invention will become apparent to those skilled in the art from the detailed description.
According to a first aspect of the present invention, in a semiconductor integrated circuit package and method of producing the package, an IC packaging process is carried out in a wafer state including external electrodes, resin is deposited and hardened on the wafer in the wafer state to form junctions between a glass coating and resin to produce a barrier for protecting the IC from the surrounding environment, dicing/slicing/cutting are carried out, and, thereafter, chips are separated from each other to produce flip-chips. Because the ILB process in the conventional TAB technique is omitted-in the bump-forming process, the problem in the conventional method of controlling the applied pressure in the ILB process is solved. Further, the other problem in the conventional method that the electrical characteristics deteriorate due to the inductance of the leads is also solved because inner leads and outer leads are omitted. The outer lead-forming process is included in the bump production process, thereby effectively utilizing the IC chip characteristics. In addition, because the external electrodes are cleaned, the wafer surface is flattened, and when the IC chip is mounted on a substrate, production and incorporation of an IC chip into a package are performed easily, stably, and precisely.
According to a second embodiment of the present invention, a flip-chip package produced after separation of a chip from a wafer is provisionally mounted on a burn-in board by soldering and then a burn-in test is carried out. The flip-chip is heated to melt the soldered part, and the package is taken off the burn-in board and mounted on a printed circuit board with the external electrodes directly bonded to the wiring patterns on the board, thereby completing incorporation of the elements onto the printed circuit board. Therefore, a problem in the conventional method that an IC lead is likely to become curved while being inserted into an IC socket under pressure in the conventional burn-in test is solved, resulting in a highly reliable device.
According to a third embodiment of the present invention, a method of producing a semiconductor integrated circuit package includes packaging plural kinds of ICs into respective flip-chip packages, mounting those packages on a printed circuit board by soldering, heating for surface tension position correction, and repeating multi-chip system tests while replacing faulty chips, thereby constructing multi-chip modules. Thereby, highly reliable multi-chip modules are obtained.
According to a fourth aspect of the present invention, a method of mounting a semiconductor integrated circuit package includes placing solder on a printed circuit board and adhering radiating fins with a heat conductive grease to a surface opposite a front surface of the described protective package, the front surface having electrodes thereon. Therefore, heat generated in the IC chip is directly radiated through the radiating fins, resulting in a high heat radiation efficiency.